1. Field of the Invention
The present invention relates to a multi-terminal laminated ceramic capacitor with low ESL.
2. Description of the Related Art
Such laminated ceramic capacitors have been required to have ESL reduced with increase in frequency of electronic devices on which the capacitors are to be mounted. As means for realizing low ESL, Japanese Unexamined Patent Application Publication No. 2000-208361 discloses increasing the electrode width of terminal electrodes.
Recently, furthermore, the market demand for miniaturization of electronic devices has been rapidly increasing, and further miniaturization of laminated ceramic capacitors to be mounted thereon is also demanded in accordance with the technical trend.
Under normal conditions, however, the miniaturization of laminated ceramic capacitors necessarily reduces the electrode width of terminal electrodes, contrary to the demand for low ESL.
In addition, reducing the electrode width of terminal electrodes greatly increases the risk of undesirable exposure of internal electrodes, causing decrease in the manufacturing yield and the reliability.
In multi-terminal laminated ceramic capacitors on which many terminal electrodes have to be formed, moreover, increasing the electrode width of terminal electrodes to realize low ESL and prevent undesirable exposure of internal electrodes results in decreasing the pitch between adjacent terminal electrodes. This greatly increases the risk of short-circuit failure between adjacent terminal electrodes, for example, due to occurrence of solder bridging during soldering to a mounting substrate.